Rajeev K. Dokania
E4, 301
Maplehill Apartment
Maple Avenue
Ithaca, NY 14850
Email: rkd9 at cornell dot edu
Mobile Phone: (607)351-5942
Graduate Research
- Ultra Low Power UWB Impulse Radio Design: Impulse radios have the potential to provide low power, low data rate wireless communication and is useful for distributed sensor networks as well as human body network. Distributed sensor network has multiple uses such as intrusion detection, tracking etc. While, Human Body Network can find applications in personal health care for it's ability to wirelessly communicate EEG, ECG data as well as automation of drug-delivery. since low power is the main criteria for these applications, agressive duty-cycling is required for the transmitter and Reciever circuits which thereby requires good synchronization between multiple nodes. I work in this project with my colleague Xiao Wang. Our scheme makes use of firefly synchronization method to give a global synchronized view of the network. In this project we are looking into time domain characteristics of wide-band antennas, pulse-shaping circuits, pulse-detection circuits, interference mitigation techniques as well as data-scheduling and network protocols.
- On-chip Optical Interconnects:(Architectural modeling, Circuit design, and Photonic Device robustness & tuning): With the rapid advances and equally impressive successes in siliconizing photonics, researchers across the world are looking towards photonics to deliver on integrated applications. In this collaborative research we work on interconnect modeling, multi-core architectural advantage assesment, coherency protocol for optical interconnect architecture, high speed electrical circuit designs (e.g. Clock and Data Recovery circuits, modulator driver, amplifiers), as well as integrational challenges with the silicon photonic devices. We also look into process and thermal tuning of the silicon-ring modulators.
Undergraduate Research
- Peak Current detector based DC-DC buck Converter: Switch mode power regulator ICs are the first stage ICs for any electronic system. The design and efficiency of these modules is highly warranted in any system particularly so for portable applications. In this work we propose and implement an efficient way of designing the DC-DC buck converter, where the timing decisions are made in a closed-loop format unlike the conventional open loop format. This results in significant efficiency for applications like cellular phones, where the peak load comes only infrequently.
- Cancellation of load regulation in Low Dropout Regulators: Modern state-of-the-art technologies require higher accuracy performance from voltage regulators. With load regulation performance being a significant factor, special attention is warranted in reducing its negative effects. In this we came up with a method for cancelling load regulation, based on level shifting the reference. The load current is monitored, sensed and used to dynamically adapt the effective value of the reference voltage. We were able to reduce a typical 2.5% load regulation droop to a mere 0.2%, without compromising the system stability or any other performance parameters.
Work Experience
- Component Design Engineer: June 2003- August 2005. Intel, Bangalore: Worked with Intel at Bangalore on DFX of two different network-router projects and one multi-core server processor. The work involved concept, design and architecture of different DFX features such as in-die variation, benchmarking, BIST designs (for small array memories, high speed serdes, PLLs, bulk memories), scan tests, IO-tests, leakage, structural and functional test structure insertion, test structure designs for reliability tests, thermal management, pin-maps, pattern generation, testing and debug with support for cycle-determinism. I also worked on yield analysis and design for regaining manufacturing yields.
- Graduate intern, July 2006-January 2007. Intel, Santaclara: Worked as a graduate intern in Photonics technology lab lead by Mario Paniccia on testing of high speed optical modules to facilitate optical egress for high-data rate debug applications. Looked into intel's proprietery high-speed interface( "quickpath" or "CSI" with system platform) and associated difficulties and opportunities in optical domain.
- Under-graduate intern, May 2002- July 2002, Yamacraw, Georgia Tech: As part of compulsory industrial training worked on the low-dropout regulators under the guidance of Dr. Rincon-Mora in Georgia Tech, Atlanta.
Publications
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Journals
- [J3] Manipatruni, S., Dokania, R., Schmidt, B., Droz, N., Poitras, C., Apsel, A. and Lipson, M. "Wide Temperature Range Operation of Micron-scale Silicon Electro-optic Modulators", Optics Letters, Vol, 33, No. 19, Sept. 2008.
- [J2] N. Kirman, M. Kirman, R.K. Dokania, J.F. Martinez, A.B. Apsel, M.A. Watkins and D.H. Albonesi "On-chip optical technology in future bus-based chip multicore designs" Micro Top Picks of computer architecture conferences, IEEE. Jan/Feb 2007.
- [J1] R.K. Dokania and G.A. Rincon-Mora, "Cancellation of load regulation in low drop-out regulators" Electronic Letters, IEE, Volume 38, Issue 22, October 2002, pages: 1300-1302.
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Conference
- [C6] A. Apsel, R. Dokania and X. Wang,"Ultra-Low Power Radios for Ad-Hoc Networks", IEEE International Symposium on Circuits and Systems, 24-27 May 2009, Taipei, Taiwan.
- [C5] X. Wang, R. Dokania and A. Apsel,"Implementation of a Global Clocking Scheme for ULP Radio Networks", IEEE International Symposium on Circuits and Systems, 24-27 May 2009, Taipei, Taiwan.
- [C4] R.K. Dokania and A.B. Apsel,"Analysis of Challenges for On-Chip Optical Interconnects", ACM Proceedings of Great Lakes Symposium on VLSI, May 10-12 , 2009, Boston.
- [C3] S. Manipatruni, R.K. Dokania, B. Schmidt, J. Shakya, A.B. Apsel and M. Lipson, "Wide Temperature Range Operation of Resonant Silicon Electro-Optic Modulators " Integrated Photonics and Nanophotonics Research and Applications(IPNRA), 14th July, 2008, Boston.
- [C2] N. Kirman, M. Kirman, R.K. Dokania, J.F. Martinez, A.B. Apsel, M.A. Watkins and D.H. Albonesi, "Leveraging Optical Technology in Future Bus-Based Chip Multiprocessors" Proceedings of Intl' symposium on microarchitecture (MICRO '06) , IEEE CS press. 11-13 December 2006, pages: 492-503.
- [C1] R.K. Dokania, S.K. Baranwal and A. Patra, "Peak current detector based control of DC-DC buck converter for portable application" proceedings of IEEE INDICON 2004, 22-24 December 2004, pages: 594-596.
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Patent Disclosures
- [D2] R.K. Dokania, X. Y. Wang and A. B. Apsel , "Method and Apparatus for localized synchronization detection & retention and Transceiver design for PCO based UWB Impulse Radio and network", filed October 2008.
- [D1] S. Manipatruni, R.K. Dokania, A. B. Apsel and M. Lipson, "Method and Apparatus for Wide Temperature Range Operation of Resonant Silicon Electro-optic Modulators", filed August 2008.
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Thesis
- [T2] R.K. Dokania, "On-Chip Optical Interconnects: Architecture, Circuit, & Device Challenges and Directions " - M.S. Thesis under the guidance of Dr. Alyssa Apsel, 2008, Cornell University, USA.
- [T1] R.K. Dokania, "Design of bang-bang controlled dc-dc buck converter integrated with LDO" - B.Tech(H) Thesis under the guidance of Dr. Amit Patra, May, 2003, IIT Kharagpur, India.
Awards
- Intel Foundation PhD Fellowship Award 2007-2008 and 2008-2009
- IEEE-MICRO "Top-Picks" paper(one of the top papers of computer architecture conferences based on industrial relevance) in Jan-feb 2007
- "Institute Silver medal" for Graduating at the top of the electrical engineering branch in IIT Kharagpur, 2003.
- "Best Outgoing student" in EE in IIT Kharagpur, 2003.
- "Best Final year project" in EE in IIT Kharagpur, 2003.
- Selected in "All India Telent Search Exam" by Sahara India, 1996.
- "SRA" at Intel India, 2005.
- Best project award in RF Circuit design course at cornell in spring 2007.
Education
- B.Tech(H) , EE, IIT Kharagpur 1999-2003.
- MS-PhD, ECE, Cornell University, Fall 2005- Present.

